Redid layout with JLC library symbols

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zyphlar

2026-07-04 03:28:12 -07:00

parent 600cf052a8

commit 03ff592b3c

18 changed files with 156292 additions and 2404 deletions

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EASYEDA_MODELS/CONN-SMD_21P-P1.25_C9900019453.step

+64551

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EASYEDA_MODELS/CONN-SMD_23P-L25.0-W3.0-P1.00-L_TE_2-84982-3.step

+28882

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EASYEDA_MODELS/FPC-SMD_HCTL_HC-FPC-03-10-17RLTAG.step

+26628

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EASYEDA_MODELS/SOIC-8_L5.3-W5.3-P1.27-LS7.9-BL.step

+24740

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